HDL Array Accessing

Component Development
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1

Has anyone else come across an issue where using array properties with other properties before them can results in them being misaligned in memory?

For example using the following component spec results in any access to the properties from within the worker only being able to set the second element, or the first of the following array.

Spec:

<ComponentSpec>
  <!-- issues seem to persist unless 32 bits worth of non-array properties are used, e.g. 4 chars, 2 shorts or 1 long -->
  <property name='char_prop' type='char' volatile='true'/> 
  <property name='array_prop_1' type='short' arraylength='2' volatile='true'/>
  <property name='array_prop_2' type='short' arraylength='2' volatile='true'/>
</ComponentSpec>

Worker Code:

props_out.char_prop <= to_char(1);
props_out.array_prop_1 <= (to_short(2),to_short(3));
props_out.array_prop_2 <= (to_short(4),to_short(5));

Result:

OCPI( 1: 12.0166): demo_proxy: padding_front: \001
OCPI( 1: 12.0172): demo_proxy: array_prop_1: 0,2
OCPI( 1: 12.0178): demo_proxy: array_prop_2: 3,4

Gitlab example project:

2

I think you’ve hit this issue:

I have not returned to this issue to continue the debugging I started, but for now to avoid the issue, you can use ulong instead.

As far as I could tell, this only occurs with arrays of ushort. Every other type of array was fine.

3

Thanks Dom that seems to match the issue, though I was using shorts.
I’ll swap to long for now as that didn’t seem to exhibit the same behaviour.